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9260L ping²»Í¨³¬¼¶ÖÕ¶Ë Post By£º2011-8-16 10:50:00 [Ö»¿´¸Ã×÷Õß]
RomBOOT       
Nand flash enable periph clock                               FirstBoot2::HY27US0812 64MB                            Start eboot...               Master Clock is 47928517 HzÿDebug Serial Initialized                                                     Microsoft Windows CE Ethernet Bootloader Common Library Version 1.1 Built Jul  6                                                                                  2011 16:23:34               WinCE Ethernet Bootloader 1.7 for the EM9X60 boards (built Jul  7 2011)                                                                        Adaptation performed by EMTRONIX (c) 2009                                          RST_STATE = 0              RST_STATE = 0              ->LLD_InitNandChipset K9F5608U0D                                 ---------------------------------------                                        --- Configuring Chip Select 3       ---                                        --------------------------------                               ---         Desired timings         ---                                        ---------------------------------------                                        dwNWE_SETUP      20                    dwNCS_WR_SETUP   10                    dwNRD_SETUP      20                    dwNCS_RD_SETUP   10                    dwNWE_PULSE      40                    dwNCS_WR_PULSE   70                    dwNRD_PULSE      60                    dwNCS_RD_PULSE   70                    dwNRD_CYCLE      90                    dwNWE_CYCLE      90                    dwClockPeriod_ns 16                    ---------------------------------------                                        ---           Real timings          ---                                        ---------------------------------------                                        dwNWE_SETUP      32                    dwNCS_WR_SETUP   16                    dwNRD_SETUP      32                    dwNCS_RD_SETUP   16                    dwNWE_PULSE      48                    dwNCS_WR_PULSE   80                    dwNRD_PULSE      64                    dwNCS_RD_PULSE   80                    dwNRD_CYCLE      112                     dwNWE_CYCLE      112                     ->LLD_InitNandChipset K9F5608U0D                                 Master Clock is 59910656 Hz                            ---------------------------------------                                        --- Configuring Chip Select 3       ---                                        ---------------------------------------                                        ---         Desired timings         ---                                        ---------------------------------------                                        dwNWE_SETUP      20                    dwNCS_WR_SETUP   10                    dwNRD_SETUP      20                    dwNCS_RD_SETUP   10                    dwNWE_PULSE      40                    dwNCS_WR_PULSE   70                    dwNRD_PULSE      60                    dwNCS_RD_PULSE   70                  dwNRD_CYCLE      90                    dwNWE_CYCLE      90                    dwClockPeriod_ns 16                    ---------------------------------------                                        ---           Real timings          ---                                        ---------------------------------------                                        dwNWE_SETUP      32                    dwNCS_WR_SETUP   16                    dwNRD_SETUP      32                    dwNCS_RD_SETUP   16                    dwNWE_PULSE      48                    dwNCS_WR_PULSE   80                    dwNRD_PULSE      64                    dwNCS_RD_PULSE   80                    dwNRD_CYCLE      112                     dwNWE_CYCLE      112                     Nand Flash correctly Initialized                                 WDTC_WDMR = 3FFF2FFF                     WDTC_WDMR = 8000                 Press [ENTER] to launch image stored in flash or [SPACE] to cancel.                                                                    Initiating image launch in 0 seconds. System ready!                                                    Preparing for download...                          memset 80067000 len=1b6fed4IsValidBlock_Sect : Invalid block                                                             FMD_DirectRead - OEMReadImgFromFlash - Addr = 24000                                                    Download successful!  Jumping to image at 0x80068000 (physical 0x20068000)...                                                                              Windows CE Kernel for ARM (Thumb Enabled) Built on Aug  4 2008 at 18:38:38                                                                           ProcessorType=0926  Revision=5                               sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable = 80068020                                                                             +OALIntrInit             +OALIntrMapInit                -OALIntrMapInit                +SOCPioIntrInit()                  -SOCPioIntrInit()                  +OALIntrStaticTranslate(17, 21)                                -OALIntrStaticTranslate                        -OALIntrInit(rc = 1)                     Initialize driver globals Zeros area...                                        pDrvGlobalArea 0x80058000  size 0x800 (0x80058800 -0x80058000)                                                               ---------------------------------------                                        --- Configuring Chip Select 1       ---                                        ---------------------------------------                                        ---         Desired timings         ---                                        ---------------------------------------                                        dwNWE_SETUP      0                   dwNCS_WR_SETUP   0                   dwNRD_SETUP      0                   dwNCS_RD_SETUP   0                   dwNWE_PULSE      0                   dwNCS_WR_PULSE   0                   dwNRD_PULSE      0                   dwNCS_RD_PULSE   0                   dwNRD_CYCLE      0                   dwNWE_CYCLE      0                   dwClockPeriod_ns 7                   ---------------------------------------                                        ---           Real timings          ---                                        ---------------------------------------                                        dwNWE_SETUP      0                   dwNCS_WR_SETUP   0                   dwNRD_SETUP      0                   dwNCS_RD_SETUP   0                   dwNWE_PULSE      0                   dwNCS_WR_PULSE   0                   dwNRD_PULSE      0                   dwNCS_RD_PULSE   0                   dwNRD_CYCLE      0                   dwNWE_CYCLE      0                   OALTimerInit             +OALTimerInit              Master Clock is 133339592 Hz                             Test : 0x208d              g_oalTimer.msecPerSysTick : 0x1                                g_oalTimer.countsPerMSec : 0x208d                                  g_oalTimer.countsMargin : 0x0                              g_oalTimer.maxPeriodMSec : 0x7c                                g_oalTimer.countsPerSysTick : 0x208d                                     g_oalTimer.actualMSecPerSysTick : 0x1                                      g_oalTimer.actualCountsPerSysTick : 0x208d                                           g_oalTimer.curCounts : 0x0                           Master Clock is 133339592 Hz                             -OALTimerInit              pDrvGlobalArea->bEboot == TRUE. Forcing Clean Object store                                                           +OEMPowerManagerInit                     -OEMPowerManagerInit                     OALKitlStart             force clean  (@0x81c384f4 = 0x1) = TRUE                                        EM9X60 Init            Master Clock is 133339592 Hz                             ---------------------------------------                                        --- Configuring Chip Select 5       ---                                        ---------------------------------------                                        ---         Desired timings         ---                                        ---------------------------------------                                        dwNWE_SETUP      50                    dwNCS_WR_SETUP   30                    dwNRD_SETUP      50                    dwNCS_RD_SETUP   30                    dwNWE_PULSE      420                     dwNCS_WR_PULSE   440                     dwNRD_PULSE      420                     dwNCS_RD_PULSE   440                     dwNRD_CYCLE      500                     dwNWE_CYCLE      500                     dwClockPeriod_ns 7                   ---------------------------------------                                        ---           Real timings          ---                                        ---------------------------------------                                        dwNWE_SETUP                     dwNCS_WR_SETUP   35                    dwNRD_SETUP      56                    dwNCS_RD_SETUP   35                    dwNWE_PULSE      420                     dwNCS_WR_PULSE   441                     dwNRD_PULSE      420                     dwNCS_RD_PULSE   441                     dwNRD_CYCLE      511                     dwNWE_CYCLE      511                     ->EM9160 Features Setup                        EM9x60 Valid Check Passed                          EM9x60 Platform Check LCD...Type = 5, Started                                              +OEMInitWatchDogTimer                      AT91SAM926x_DispWatchDog 8000!                               OEMInit::pause WDT refresh                           Sp=ffffc7cc            OEMIoControl: Unsupported Code 0x10100b4 - device 0x0101 func 45                                                                 +OALIoCtlHalInitRTC(...)                         OALIoCtlHalInitRTC::GPBR0=0x507c9570, GPBR1=0xbb8, GPBR2=                                                         OEMIoControl: Unsupported Code 0x101008c - device 0x0101 func 35                                                                 ->FMD_Init +SoftECC                    ->LLD_Init::Small Sector NandChip                                  +OALIntrRequestSysIntr(1, 0x8d, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 16)                                     Master Clock is 133339592 Hz                             ---------------------------------------                                        --- Configuring Chip Select 3       ---                                        ---------------------------------------                                        ---         Desired timings         ---                                        ---------------------------------------                                        dwNWE_SETUP      20                    dwNCS_WR_SETUP   10                    dwNRD_SETUP      20                    dwNCS_RD_SETUP   10                    dwNWE_PULSE          dwNCS_WR_PULSE   70                    dwNRD_PULSE      60                    dwNCS_RD_PULSE   70                    dwNRD_CYCLE      90                    dwNWE_CYCLE      90                    dwClockPeriod_ns 7                   ---------------------------------------                                        ---           Real timings          ---                                        ---------------------------------------                                        dwNWE_SETUP      21                    dwNCS_WR_SETUP   14                    dwNRD_SETUP      21                    dwNCS_RD_SETUP   14                    dwNWE_PULSE      42                    dwNCS_WR_PULSE   70                    dwNRD_PULSE      63                    dwNCS_RD_PULSE   70                    dwNRD_CYCLE      98                    dwNWE_CYCLE      98                    +OALIntrReleaseSysIntr(16)                           -OALIntrReleaseSysIntr(rc = 1)                               ->LLD_Init::Small Sector N                         +OALIntrRequestSysIntr(1, 0x8d, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 16)                                     Master Clock is 133339592 Hz                             ---------------------------------------                                        --- Configuring Chip Select 3       ---                                        ---------------------------------------                                        ---         Desired timings         ---                                        ---------------------------------------                                        dwNWE_SETUP      20                    dwNCS_WR_SETUP   10                    dwNRD_SETUP      20                    dwNCS_RD_SETUP   10                    dwNWE_PULSE      40                    dwNCS_WR_PULSE   70                    dwNRD_PULSE      60                    dwNCS_RD_PULSE   70                    dwNRD_CYCLE      90                    dwNWE_CYCLE      90                    dwClockPeri           ---------------------------------------                                        ---           Real timings          ---                                        ---------------------------------------                                        dwNWE_SETUP      21                    dwNCS_WR_SETUP   14                    dwNRD_SETUP      21                    dwNCS_RD_SETUP   14                    dwNWE_PULSE      42                    dwNCS_WR_PULSE   70                    dwNRD_PULSE      63                    dwNCS_RD_PULSE   70                    dwNRD_CYCLE      98                    dwNWE_CYCLE      98                    OEMIoControl: Unsupported Code 0x10100c4 - device 0x0101 func 49                                                                 OEMIoControl: Unsupported Code 0x10100c4 - device 0x0101 func 49                                                                 SPIDriver - SPI_Init - Context: Drivers\Active\03                                                  Quit Install SPI                 SPI_Init - Failed to load registry (CS)                                        SPIDriver - SPI_Init - Context: Drivers\Active\04                                                  Quit Install SPI                 SPI_Init - Failed to load registry (CS)                                        SPIDriver - SPI_Init - Context: Drivers\Active\05                                                  Quit Install SPI                 SPI_Init - Failed to load registry (CS)                                        SPIDriver - SPI_Init - Context: Drivers\Active\06                                                  Quit Install SPI                 SPI_Init - Failed to load registry (CS)                                        OEMIoControl: Unsupported Code 0x10100d0 - device 0x0101 func 52                                                                 OEMIoControl: Unsupported Code 0x10100f8 - device 0x0101 func 62                                                                 Loading WinCE driver for AT                           Using registry ethernet configuration                                      -->EDeviceInitialize(0)                        EM9160 PA2 as PHY Hardware Reset                                 PHY ID : 181b8b1                 Always begin with Autonegotiation...                                     PHY_GetConfiguration : autoneg not complete                                            PHY_GetConfiguration : autoneg is completed!                                             EMAC Init: 100 Mbps FULL DUPLEX (MII)                                      +OALIntrRequestSysIntr(1, 0x15, 0x00000008)                                            -OALIntrRequestSysIntr(sysIntr = 17)                                     +OALIntrRequestSysIntr(1, 0xa, 0x00000000)                                           -OALIntrRequestSysIntr(sysIntr = 18)                                     +OALIntrRequestSysIntr(1, 0x85, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 19)                                     Master Clock is 133339592 Hz                             DeviceFolder::LoadDevice!Enumerate Found deprecated load instructions at (Driver                                                                                 s\BuiltIn\AFD). Driver cannot be unloaded.                                                                                     +OALIntrRequestSysIntr(1, 0x6, 0x00000                                                                                 000)     -OALIntrRequestSysIntr(sysIntr = 20)                                     Master Clock is 133339592 Hz                             +OALIntrRequestSysIntr(1, 0x8, 0x00000000)                                           -OALIntrRequestSysIntr(sysIntr = 21)                                     Master Clock is 133339592 Hz                             +OALIntrRequestSysIntr(1, 0x7, 0x00000000)                                           -OALIntrRequestSysIntr(sysIntr = 22)                                     Master Clock is 13333959                        +OALIntrRequestSysIntr(1, 0x17, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 23)                                     Master Clock is 133339592 Hz                             +OALIntrRequestSysIntr(1, 0x19, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 24)                                     Master Clock is 133339592 Hz                             +OALIntrRequestSysIntr(1, 0x18, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 25)                                     Master Clock is 133339592 Hz                             DeviceFolder::LoadDevice!Enumerate Found deprecated load instructions at (Driver                                                                                 s\BuiltIn\PPP). Driver cannot be unloaded.                                                                                     DeviceFolder::LoadDevi                                                               nd deprecated load instructions at (Drivers\BuiltIn\SNMP). Driver cannot be unlo                                                                                 aded.           USB:OhcdPdd_Init                      ++InitializeOHCI                 +OALIntrRequestSysIntr(1, 0x14, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 26)                                     --InitializeOHCI                 ExSerInit::quit COM8 driver installation.                                          Hardware doesn<|>t init correctly, COM_Init failed                                                 ExSerInit::quit COM9 driver installation.                                          Hardware doesn<|>t init correctly, COM_Init failed                                                 +-->PWM_Init             +OALIntrRequestSysIntr(1, 0x1a, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 27)                                     +OALIntrRequestSysIntr(1, 0x1b, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 28)                                     +OALIntrRequestSysIntr(1, 0x1c, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 29)                                     Master Clock is 133339592 Hz                             ExSerInit::quit COM10 driver installation.                                           Hardware doesn<|>t init correctly, COM_Init failed                                                 ExSerInit::quit COM11 driver installation.                                           Hardware doesn<|>t init correctly, COM_Init failed                                                 ExSerInit::quit COM12 driver installation.                                           Hardware doesn<|>t init correctly, COM_Init failed                                                 ExSerInit::quit COM13 driver installation.                                           Hardware doesn<|>t init correctly, COM_Init failed                                                 ExSerInit::quit COM14 driver installation.                                           Hardware doesn<|>t init correctly, COM_Init failed                                                 ExSerInit::quit COM15 driver installation.                                           Hardware doesn<|>t init correctly, COM_Init failed                                                 cable attached               -->EMACB::DeviceReset                      -->EDeviceInitialize(1)                        PHY ID : 181b8b1                 Always begin with Autonegotiation...                                     PHY_GetConfiguration : autoneg is completed!                                             +OALIntrRequestSysIntr(1, 0x1e, 0x00000000)                                            -OALIntrRequestSysIntr(sysIntr = 30)                                     +OALIntrRequestSysIntr(1, 0x1d, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 31) OEMIoControl: Unsupported Code 0x10100fc - device 0x0101 func 63 PHY_GetConfiguration : autoneg is completed! EMAC Init: 100 Mbps FULL DUPLEX (MII) EM9160 Emtronix Built at Jul  7 2011 11:14:22 Adaptation performed by Emtronix (c) wstartup::resume WDT refresh 1  AdapterName: EMACB1Explorer(V2.0) taskbar thread started. NDISPWR:: Found adapter [EMACB1]  CopyFile: 0 RegOpenKeyEx Comm\EMACB1 0  IPAddr: 192.168.201.205    SubnetMask: 255.255.255.0    Gateway: 192.168.201.8 FileName:\NandFlash\dbginfo.txt CreatFile 839D84A6 File bResult=1 nBytes=190 DHCP Disable  IP Parameters aren<|>t changed, need not set AdapterIPProperties autotest.txt file isnot exist! |
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